Magnetic random access memory (MRAM) devices are non-volatile memory devices that use a magnetoresistance effect to store information. In MRAM devices, the resistance of an electrical conductor is changed in response to a circumferential magnetic field to store information. The MRAM devices may include a plurality of MRAM cells, each of which may include a magnetic tunnel junction (MTJs), on a single transistor.
The MTJ may include a plurality of thin layers. In particular, electrons may tunnel through a very thin insulating layer that is sandwiched between, for example, two ferromagnetic electrodes in response to the application of an external electrical signal. Conventionally, the top electrode is called a free layer and the bottom electrode is called a pinned layer.
When the direction of the magnetic fields within the free layer and the pinned layer are arranged to be parallel to each other, the tunneling current that flows through the MTJ may tend towards its maximum value, and the tunneling resistance may tend towards its minimum value in this situation. On the other hand, when the direction of the magnetic fields within the free layer and the pinned layer are arranged to be perpendicular to each other, the tunneling current that flows through the MTJ may tend towards its minimum value, and the tunneling resistance will typically tend towards its maximum value in this situation.
Digital data (i.e., “0” and “1” data) may be stored in the MTJ by designating the low resistance state where the magnetization directions of the two electrodes are parallel to each other as one of the binary states and the high resistance state where the magnetization directions of the two electrodes are perpendicular to each other as the other of the binary states. In such devices, there are two cell types that are widely used to read the “0” and “1” states. These cell types are commonly referred to as a reference cell type and a twin cell type.
One method for reading digital data out of an MRAM cell is disclosed in U.S. Pat. No. 6,496,436 B2 to Naji, entitled “Reference Voltage Generator for MRAM and Method.” Pursuant to this method, the MRAM device includes MRAM cells that are connected to at least one bit line, and a reference column that is disposed adjacent to the bit line that includes a reference voltage generator. The reference voltage generator includes a plurality of MTJs. Each of the MTJs connected to the reference voltage generator is set to have either a maximum resistance or a minimum resistance. These MTJs are then interconnected to provide an intermediate value of reference resistance between the maximum and minimum values. Both the bit line and the reference column are connected to a sense amplifier. An electrical signal output from one of the MRAM cells connected to the bit line may be compared with an electrical signal output from the reference column that is commonly connected to the sense amplifier. In this fashion, a low resistance state may be discriminated from a high resistance state to determine whether a “0” or “1” is stored in the selected MRAM cell.
A problem, however, may arise when using the above-described reference cell method for reading data from an MRAM cell. The current that is used to read data from the cell flows through a tunneling layer of the MTJ. An insulating layer, such as an aluminum layer, is widely used as the tunneling layer. Thus, the resistance value of the MTJ may be the sum of the resistance value of the tunneling layer and the resistance value that results from the arrangement of the magnetization directions within the free layer and the pinned layer. The resistance value of the tunneling layer, however, may vary with the thickness of the tunneling layer. The thickness of the tunneling layer typically is not constant because of manufacturing variation. Consequently, the resistance of the MTJ will often vary between MTJ cells due to variations in the thickness of the tunneling layer.
The above-described variation in the resistance of MTJ cells may make it difficult to use the reference cell approach for reading data from MRAM devices. The reason for this is that, for proper operation of the device, the change in the magnetoresistance of the MTJ that occurs when the direction of the magnetic fields in the MTJ are switched from parallel to perpendicular to each other is not sufficiently larger than the change in the resistance value of the tunneling layer that can be expected due to expected manufacturing variation using conventional mass production manufacturing techniques.
Because of the above-mentioned problem with the reference cell method of reading data from an MRAM cell, twin cell methods of reading data from MRAM devices have been suggested. In twin cell MRAM devices, one bit of data is written (i.e., stored) in two MTJs by writing the data bit to a first MTJ and writing a complementary data bit to the second MTJ. Both data bits may then be read by comparing the resistance of each MTJ cell to the reference cell. Consequently, in twin cell MRAM devices the amount of magnetoresistance change is doubled and hence is less sensitive to the “noise” that may be introduced by manufacturing variations in the thickness of the tunneling layers.
FIG. 1 is a circuit diagram of a prior art twin cell MRAM device. FIG. 2 is an enlarged view of a portion of the circuit diagram of FIG. 1. As shown in FIG. 1, the twin cell type MRAM device may include a plurality of parallel bit lines B01, B11, B02, B12 which are arranged to form columns, and a plurality of parallel word lines Wi, Wj which are arranged to form rows. In addition, a plurality of digit lines Di, Dj may be provided which cross the bit lines B01, B11, B02, B12. MTJs are provided at the intersections of the bit lines B01, B11, B02, B12 and the digit lines Di and Dj, respectively. Each MTJ is connected to an access transistor TA. As shown in FIG. 1, one end of each MTJ is connected to one of the access transistors TA and the other end of the MTJ is connected to one of the bit lines B01, B11, B02, B12. The gate electrode of each of the access transistors TA is connected to one of the word lines Wi, Wj. Adjacent bit lines B01, B11 are connected to sense amplifier SA1 to form a first bit line pair and bit lines B02, B12 are connected to sense amplifier SA2 to form a second bit line pair.
As noted above, each MTJ is connected to one of the bit lines B01, B11, B02, B12. As shown by the dotted line box labeled “A” in FIG. 1, the MTJs are arranged as pairs of MTJs that are used to store complementary information. For example, when the pair of MTJs “A” is programmed, a digit line program current is applied to the selected digit line Di, and a bit line program current is applied to the pair of bit lines B01 and B11. The bit line program current is applied in a forward direction to one of the pair of MTJs and is applied in a reverse direction to the other of the pair of MTJs. As a result, the data stored in the first of the MTJs is the opposite of the data stored in the second of the MTJs in the pair of MTJs “A”.
To read the data stored in the MTJ pair labeled “A”, the electrical potentials of the pair of bit lines B01 and B11 are compared by the first sense amplifier SA1 and read as one bit of data.
As shown in FIG. 2, a first magnetic tunnel junction Mi is arranged at the intersection of the first bit line B01 and the digit line Di, and a second magnetic tunnel junction Mj is arranged at the intersection of the second bit line B11 and the digit line Di. When the first magnetic tunnel junction Mi is programmed, a digit line program current is applied to the digit line Di, and a forward bit line program current I0 is applied to the first bit line B01. Simultaneously, a reverse bit line program current I1 is applied to the second bit line B11. The forward bit line program current I0 induces a forward magnetic field F1 to the first bit line B01, and the reverse bit line program current I1 induces a reverse magnetic field F2 to the second bit line B11. Consequently, the first magnetic tunnel junction Mi and the second magnetic tunnel junction Mj are magnetized in opposite directions. For example, if the magnetization directions within the pinned layer and the free layer of the first magnetic tunnel junction Mi are arranged in parallel, the magnetization directions within the pinned layer and the free layer of the second magnetic tunnel junction Mj will be arranged to be perpendicular to each other. If instead, the magnetization directions within the pinned layer and the free layer of the first magnetic tunnel junction Mi are arranged to be perpendicular to each other, the magnetization directions within the pinned layer and the free layer of the second magnetic tunnel junction Mj are arranged parallel to each other.